Abstract
Next generation planar and non-planar complementary metal oxide semiconductor (CMOS)structures are three-dimensional nanostructures with multi-layer stacks that can containfilms thinner than ten atomic layers. The high resolution of transmission electronmicroscopy (TEM) is typically chosen for studying properties of these stacks such as filmthickness, interface and interfacial roughness. However, TEM sample preparation istime-consuming and destructive, and TEM analysis is expensive and can provideproblematic results for surface and interface roughness. Therefore, in this paper, we presentthe use of direct measurements of sidewall surface structures by conventional atomicforce microscopy (AFM) as an alternative or complementary method for studyingmulti-layer film stacks and as the preferred method for studying FinFET sidewallsurface roughness. In addition to these semiconductor device applications, thisAFM sidewall measurement technique could be used for other three-dimensionalnanostructures.
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