Abstract
3-D network-on-chip (NoC) is gaining popularity among designers due to scalability, higher bandwidth, fault tolerance, and reliability. However, the stacking of multiple dies leads to severe thermal problems due to increase in power density. Unequal traffic distribution across the chip and higher power density results in higher on-chip temperature resulting in performance degradation, increase in leakage power, and circuit failure. In this paper, a novel routing method called adaptive thermal-aware routing (ATAR) is proposed to alleviate peak on-chip temperature. The proposed technique is simulated using AccessNoxim simulator. The parameters for simulation are taken from Global Foundries and Tezzaron Semiconductors. Analysis of the simulation and experimental results shows that ATAR-based designs make the on-chip traffic and thermal distribution more uniform. Different traffic patterns are used for the validation of simulation, and 3-D design platforms are developed to demonstrate thermal optimization in high-performance 3-D NoC-based parallel processing systems.
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