Asynchronous logic design with subcells with an application for space

Abstract

Asynchronous sequential logic design needs to be done carefully to avoid races and hazards. As a result, typical designs are done at a fairly low level using state tables, transition diagrams, timing diagrams and flow charts. The state assignment can help alleviate races but hazards need to be addressed at every level. A technique is given where any asynchronous transition table can be synthesized using RS flip-flops and eliminating simultaneous switching of both the Reset and Set inputs to the RS flip-flop. Space flight electronics such as satellites and space probes require electronic circuits that are tolerant of radiation environments. Particle hits will upset logic nodes, altering data patterns as well as modifying stored data within registers and memory elements. The circuits should also be low power due to the limited weight of battery and solar generation systems that can be lifted into space. Asynchronous designs can lower the power in electronics used in spaceflight in areas that include processors and state sequencer/controllers. A method is given that allows asynchronous designs to be done simply, using a radiation tolerant RS flip-flop as the basic feedback storage element in the asynchronous state variable definition.