Asynchronous current‐mode multiple‐valued VLSI system based on two‐color two‐rail coding

Abstract

AbstractIn deep submicron VLSI, the asynchronous data protocol is a known technique to solve the performance degradation and increase in power dissipation problems arising from wiring such as cross queues. In this paper, we propose a new asynchronous multiple‐valued data communication scheme without rest phases in multiple‐valued data transfers. This scheme uses two‐rail R‐value complementary signal pairs, and the sum of the two‐rail signal pair is always a constant for “valid data.” Along with defining a two‐rail signal pair with each signal having an odd phase or an even phase, each signal level in the even phase is set to always be larger than in the odd phase. The sum of a two‐rail signal pair becomes the minimum and the maximum, respectively, of the odd phase and the even phase. Consequently, if the sum of the two‐rail signal pair is examined, the monotonicity can be maintained in data transitions in two phases, and valid data can be detected by a simple threshold calculation. Furthermore, an asynchronous control circuit layout based on the linear sum of a two‐rail signal pair focuses on “the ability to implement the linear addition of current only at the connections” and clearly shows the ability to implement a more compact system than current‐mode multiple‐valued circuit systems. © 2001 Scripta Technica, Electron Comm Jpn Pt 2, 84(11): 60–67, 2001