Asynchronous Architecture of Stochastic Computing Spiking Neuron Network

Abstract

Stochastic computing encodes binary numbers into stochastic pulse sequences in operating, which takes advantages of low power consumption and low resource usage. The application of stochastic computing in the design of spiking neural network (SNN) accelerator is beneficial to realize brain-like operation. In order to realize the low-power edge calculation of neural network, an asynchronous architecture using stochastic computing is designed, which can be used to realize the operation of full connected SNN. Cross array controlled by asynchronous micro-pipeline is implemented to achieve the leaky integrate and fire (LIF) neuron model. In the input layer of SNN, input values are encoded into stochastic pulses, and the synaptic weights and input pulses are calculated through accumulation, and the attenuation of neuron membrane potential value is realized based on logic calculation. The event-driven coding and the transmission of stochastic pulse are controlled by the asynchronous architecture, which can reduce the power consumption of SNN operation; The proposed architecture achieves an operation of SNN with 784 input and 10 output, which is verified on Xilinx KCU116 platform and achieves a peak throughput of 78.4 GSOPS and an energy efficiency of 137.47 GSOPS/W.