Asymmetric-ReRAM: A Low Latency and High Reliability Crossbar Resistive Memory Architecture

Abstract

Resistive Memory (ReRAM) is promising to be used as the storage-class memory due to its good scalability, high density, low standby power and non-volatility. By employing the unique crossbar structure, ReRAM can be constructed with extremely high density. However, ReRAM's crossbar structure suffers from an IR drop issue, which causes the asymmetric access latency in crossbar arrays. Moreover, without access transistors in the crossbar structure, read and write disturbances lead to serious data reliability problem. In this paper, we propose Asymmetric-ReRAM (A-ReRAM) to overcome the challenges of crossbar ReRAM. By reducing the IR drops along both wordlines and bitlines, leveraging the asymmetric access latency in crossbar arrays and exposing the most appropriate write latency to the memory controller, A-ReRAM effectively reduces the access latency. By applying the circuit-architecture level solutions, A-ReRAM addresses the read and write disturbances, and significantly improves the reliability. The experimental results show that, A-ReRAM improves system performance by 29.7% and 19.2%, and reduces the energy consumption by 21.1% and 11.3% on average, compared to the baseline and the state-of-the-art crossbar ReRAM design. Meanwhile, A-ReRAM significantly improves the reliability of ReRAM-based memory systems.