Abstract

Voltage source Multilevel Inverters (MLIs) are vital components for medium voltage and high-power applications due to their advantages like modularity and better power quality. However, the number of components used is significant. In this paper, an improved asymmetrical multilevel inverter topology is proposed producing 17-levels output voltage utilizing two dc sources. The circuit is developed to reduce the number of isolated dc-sources used without reducing output levels. The circuit utilizes six two-quadrant switches, three four-quadrant switches and four capacitors. The capacitors are self-balancing and do not require extra attention, i.e. the control system is simple for the proposed MLI. Detailed analysis of the topology under linear and non-linear loading conditions is carried out. Comparison with other similar topologies shows that the proposed topology is superior in device count, power quality, Total Standing Voltage (TSV), and cost factor. The performance of the topology is validated for different load conditions through MATLAB/Simulink environment and the prototype developed in the laboratory. Furthermore, thermal analysis of the circuit is done, and the losses are calculated via PLECS software. The topology offers a total harmonic distortion (THD) of 4.79% in the output voltage, with all the lower order harmonics being less than 5% complying with the IEEE standards.

Highlights

  • Multilevel Inverters (MLIs) are becoming very important for medium voltage high power applications day by day due to several advantages like improved power quality, lower switching stress, modularity of structures, no EMI, etc. [1,2,3].The three basic topologies for the MLIs are Flying Capacitor (FC) MLIs, Neutral Point Clamped (NPC) MLIs, and Cascaded H-Bridge (CHB) MLIs

  • The cost function of a topology approximates its implementation feasibility. It depends upon various factors like the number of semiconductors used (NIGBT), number of DC sources utilized (NDC), number of driver circuits utilized (NDr), number of capacitors used (Ncap.), number of diodes used (Nd) and the TSVpu

  • The parameters taken for the comparison are the Number of IGBT used (NIGBT), Number of DC sources used (Ndc), Number of Gate Drivers (NDr), number of capacitors used (Ncap.), Cost factors per level and per unit Total Standing Voltage (TSV) are compared

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Summary

INTRODUCTION

Multilevel Inverters (MLIs) are becoming very important for medium voltage high power applications day by day due to several advantages like improved power quality, lower switching stress, modularity of structures, no EMI, etc. [1,2,3]. The authors of [15] proposed another topology that offered lower switching stress and a higher number of levels, but the capacitors required extra attention by complex control. The authors of this work proposed an improved topology capable of producing 17-output levels while utilizing a reduced number of dc sources and switches. The authors employ two dc sources and have added self-balancing dc-link capacitors to generate a 17-level output voltage. The contribution of this work can be summarised in the following points: a) The proposed topology utilizes only two DC sources and nine switches (12 IGBTs) for producing 17 levels of output voltage. While the other three are bidirectional switches It is capable of generating 17-level output voltage by utilizing two selfbalancing capacitors across each dc source. Shows the circuit configuration and current flow path during different modes of operation

TOTAL STANDING VOLTAGE CALCULATION
CAPACITOR SIZING AND INRUSH CURRENT
CAPACITOR CHARGE BALANCING
CASCADED STRUCTURE
COST ANALYSIS OF THE CIRCUIT
SIMULATION ANALYSIS AND DISCUSSION
CAPACITOR CHARGING AND DISCHARGING
VARYING R AND RL LOAD
FIXED LOADING CONDITION
Non-Linear Load
HARDWARE IMPLEMENTATION
POWER LOSS ANALYSIS
Findings
DISCUSSION AND COMPARATIVE
CONCLUSION
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