Abstract
As the applications of power electronic converters increase across multiple domains, so do the associated challenges. With multilevel inverters (MLIs) being one of the key technologies used in renewable systems and electrification, their reliability and fault ride-through capabilities are highly desirable. While using a large number of semiconductor components that are the leading cause of failures in power electronics systems, fault tolerance against switch open-circuit faults is necessary, especially in remote applications with substantial maintenance penalties or safety-critical operation. In this paper, a fault-tolerant asymmetric reduced device count multilevel inverter topology producing an 11-level output under healthy conditions and capable of operating after open-circuit fault in any switch is presented. Nearest-level control (NLC) based Pulse width modulation is implemented and is updated post-fault to continue operation at an acceptable power quality. Reliability analysis of the structure is carried out to assess the benefits of fault tolerance. The topology is compared with various fault-tolerant topologies discussed in the recent literature. Moreover, an artificial intelligence (AI)-based fault detection method is proposed as a machine learning classification problem using decision trees. The fault detection method is successful in detecting fault location with low computational requirements and desirable accuracy.
Highlights
The increased adoption of power electronics in all areas in the electrical power domain has made various feasible innovations such as electric vehicles [1,2], HVDC transmission systems, large-scale transformation towards renewable energy resources [3]
On account of the above, this paper proposes a reduced device count asymmetric multilevel inverter topology capable of producing 11 levels under healthy operation with fault tolerance across any switch undergoing an open-circuit fault, including across multiple switches simultaneously in some cases
After training, testing was carried out to verify the performance of the prediction
Summary
The increased adoption of power electronics in all areas in the electrical power domain has made various feasible innovations such as electric vehicles [1,2], HVDC transmission systems, large-scale transformation towards renewable energy resources [3]. Implementing a large number of power semiconductor switches leads to an increased susceptibility towards fault and makes monitoring and diagnosis more complex [7] This can be unacceptable in safety-critical applications such as onboard power systems. Fault detection in CHB-MLIs has been investigated in multiple works [24,29,30,31,32], few works have focused on reduced device count topologies. On account of the above, this paper proposes a reduced device count asymmetric multilevel inverter topology capable of producing 11 levels under healthy operation with fault tolerance across any switch undergoing an open-circuit fault, including across multiple switches simultaneously in some cases. After fault mitigation, continued operation with an acceptable quality waveform on the output can be performed
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