Assessing Parallel Thread Mapping Approaches on Shared Memory SMT Architectures

Abstract

For better performance in multi-core architectures, when running parallel applications, thread mapping has become a relevant task. One way to explore this approach is to consider the memory hierarchy and the existing communication between threads. However, thread mapping is an NP-Hard problem and, therefore, heuristics have been studied to find solutions that are closer to optimal. In this context, the goal of this work is to evaluate the use of the BRD, Greedy and K-means heuristics for mapping threads in multi-core architectures with shared memory and simultaneous multithreading (SMT) support. All heuristics present performance improvements. The results show gains of up to 40.77% (with SMT) in execution time and 46.81% (with SMT) in power consumption when compared to the default Linux mapping strategy. Concerning all scenarios, SMT represents 72.22% of results with better execution time and 44.44% of results with better energy consumption.