ASIC implementation of a digital tachometer with high precision in a wide speed range

Abstract

A common method in adjustable speed drives uses an incremental shaft encoder and an electronic circuit for velocity estimation. The usual method of counting pulses coming from the encoder in a fixed period of time produces a high-precision velocity estimate in the high-speed range. High precision in the low-speed range can be achieved measuring the elapsed time between two successive pulses coming from the encoder. In this paper, a mixed method that combines the best of the two previously mentioned approaches has been implemented using a simple electronic circuit based on one field-programmable gate array (FPGA) and one read-only memory (ROM).