ASIC design and implementation of an associative memory processor for syntactic recognition

N Correa,H Burbano,A Garcia,W Ricaurte

doi:10.1109/asic.1994.404559

ASIC design and implementation of an associative memory processor for syntactic recognition

N Correa, H Burbano + Show 2 more

https://doi.org/10.1109/asic.1994.404559

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Publication Date: Sep 19, 1994

Affiliation: Universidad de Los Andes

#Associative Processor #ASIC Design + Show 8 more

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Abstract

This paper presents the ASIC design and implementation of a special purpose processor for syntactic recognition of context-free languages. The machine is an associative processor that takes advantage of the single-instruction multiple-data stream (SIMD) parallel processing capability of a content-addressable memory (CAM), designed to operate as a coprocessor in systems with an I.S.A. bus (IBM PC/AT). The processor is designed and implemented with multiple ASIC components, including both a full-custom content-addressable memory device and multiple Programmable Logic Devices (FPGA/PLD). >

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