ASIC Architecture for Implementing Blackman Windowing for Real Time Spectral Analysis

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Onus of this work is to propose a hardware efficient and flexible ASIC (application specific integrated circuit) architecture for Blackman windowing using CORDIC (co-ordinate rotation digital computer) as building block to minimize the spectral leakage and picket fence effect which are usual phenomena during spectral analysis by truncating input signals for finite length of FFT processor. A purely pipelined architecture has been adopted for the present design to ensure high throughput for real time applications with the latency equal to twice of the number of CORDIC stages plus two. The magnificence of this architecture is that window length can be changed by users for their specific applications and can be updated online for real time applications. The synthesized result of this 16 bit word size architecture with commercially available 0.18 mum CMOS technology using Synopsys Design Analyzer, shows that total estimated dynamic power to be 152 mW with an operating frequency of 125 MHz and total core area 8 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> (approx.)