Abstract
In this work, a built-in selector synaptic memristor is proposed to minimize sneak current in synapse array. The Ti/TiO2/HfO2/Si device exhibits nonlinear and high rectifying current-voltage characteristics compared to Ti/TiO2/Si device. Under negative bias conditions, the physical model supported by material analysis reveals that the Schottky barrier at the interface between Ti and TiO2 suppresses the current. Due to nonlinear and self-rectifying characteristics, a bilayer device has a significantly larger array size (> 105 × 105) with a securing read margin of 10%, using the modified half-bias scheme. A multi-level interface-type switching behavior is desired to implement synaptic functions, including potentiation and depression, and spike-timing-dependent plasticity. It was verified that the recognition rate in the bilayer device is significantly more accurate in a neural network model employing the Fashion MNIST dataset.
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