Area optimized Negative charge pump for localised body biasing in FDSOI

Abstract

This work exhibits a very less area possessed negative charge pump (NCP) solution for an on-chip localized body bias generator (BBG) with very nearly zero settling time for use in critical path replicas clearance in addition process and voltage compensation and dynamic energy optimization. The negative voltage generator is executed with 28nm Ultra Thin Body and Box Fully Depleted Silicon On Insulator (UTBB FDSOI) for 0.85–1.3V inputs. Its area occupancy is 2.94 μm2 and power occupancy is 34μW. It supports the body bias generator to having very less area so body bias generator can be sprinkled with standard cells to enhance performance and robustness of the design.