Area I/O's potential for future processor systems

Abstract

Bandwidth, latency, system speed, and, of course, the size of future microprocessor systems all highly depend on interconnection technologies. Interconnection will become the key performance bottleneck as semiconductor technology improvements continue to reduce feature size. In this article, we describe the use of on-chip area I/O for future microprocessor systems on the basis of a case study we made of an Intel Pentium system. Area I/O is simply a method of locating I/Os over the entire chip instead of just the periphery. We show that system designers can achieve significant performance gains with area I/O and size reductions at both the system and chip levels. We also explain how area I/O in conjunction with high-density interconnects leads to a new package and chip partitioning concept.