Area efficient folded undecimator based ECG detector

A Uma,P Kalpana

doi:10.1038/s41598-021-82231-2

Abstract

This paper presents an area-efficient folded wavelet filter-based Electrocardiogram (ECG) detector for cardiac pacemakers. The modified folded undecimator based detector consists of Wavelet Filter Bank, QRS complex detector with Generalized Likelihood Ratio Test (GLRT) block and noise detector. A high-level transformation technique such as folding transformation and Cutset retiming are applied to the GLRT block in order to reduce the silicon area. Folding is a high-level transformation applied at the architectural level to enhance the performance of DSP architectures. It reduces the number of adders, multipliers and delay elements in the architecture. The Cutset retiming reduces clock period of the architecture by changing position of delay elements in the critical path. The folding transformation and cutset retiming implement the functional blocks of the GLRT circuit with minimum hardware. The modified folded ECG detector is tested for short term and long-term MIT-BIH databases. The results show that the modified folded undecimator detector has hardware savings and achieves sensitivity of 99.95%, positive prediction of 99.97% and Detection Error Rate (DER) of 0.061. The folded GLRT block architecture is synthesized with FPGA Zed board XC7Z010CLG484-1. Results show that the device utilization and power consumption are lesser than the conventional GLRT structure.

Highlights

This paper presents an area-efficient folded wavelet filter-based Electrocardiogram (ECG) detector for cardiac pacemakers
Due to advances in Integrated Circuit (IC) technology, there is a high demand for low-cost implantable devices and body monitoring systems
The modified architecture is tested with signals of MIT-BIH short time database (10-s), medium database (1-min) and full length database (1-h)[22,26].The performance of both conventional and modified ECG detectors are evaluated using sensitivity S e, Positive prediction P + and Detection Error Rate(DER)[9,23,27]

Summary

Introduction

This paper presents an area-efficient folded wavelet filter-based Electrocardiogram (ECG) detector for cardiac pacemakers. An efficient fractional order-based lattice wave digital filter[5] is realized with a minimum number of multipliers This lattice filter performs R-peak detection using slope information, dynamic compression, and cross-correlation. A wavelet transform based approach is used for modelling and classification of congestive heart failures[6] This method uses the LZMA compression algorithm and peak detection with higher sensitivity and predictivity. A Biorthogonal wavelet transform based R-peak and data compression s cheme[10] is designed for cardiac pacemakers. This wavelet-based structure uses demand-based filter bank architecture which uses a cascade of three LPF and one HPF. A R-peak detection using Principle Component Analysis (PCA)[13] is studied

Methods

Results

Conclusion