Abstract
This paper presents a novel error detection linear feedback shift register (ED-LFSR), which can be used to realize error detection with a small hardware overhead for various applications such as error-correction codes, encryption algorithms and pseudo-random number generation. Although the traditional redundancy methods allow the incorporation of the error detection/correction capability in the original LFSRs, they suffer from a considerable amount of hardware overheads. The proposed ED-LFSR alleviates such problems by employing the parity check technique. The experimental results indicate that the proposed ED-LFSR requires an additional area of only 31.1% compared to that required by the conventional LFSR and it saves 39.1% and 31.9% of the resources compared to the corresponding utilization of the hardware and time redundancy methods.
Highlights
Reduction in the size of semiconductors tends to increase the number of faults in semiconductor fabrication [1,2]
We propose a novel error detection structure that avoid this problem, we propose a novel error detection linear feedback shift register (LFSR) structure that can detect undesirable canerrors detectwith undesirable errors with only a small hardware increase
ED-LFSRthe limitations of the existing redundancy methods, we propose a new error detection LFSR, which can detect errors with a small hardware overhead by employing the parity
Summary
Reduction in the size of semiconductors tends to increase the number of faults in semiconductor fabrication [1,2]. The linear feedback shift register (LFSR) is one of the most widely used sequential logics, which produces the linear function of its previous state [10,11,12,13,14,15,16,17,18,19,20,21]. Functionality of the previous state according to the generator polynomial and feedback signal [10,11,12,13,14,15,16,17,18,19,20,21]. LFSRs are used to perform the polynomial division for encoding error-correction codes produce pseudo-random patterns for encryption algorithms and test generations [21,22,23,24].
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