Abstract
The trigger voltage of the direct-connected silicon-controlled rectifier (DCSCR) was effectively reduced for electrostatic discharge (ESD) protection. However, a deep NWELL (DNW) is required to isolate PWELL from P-type substrate (PSUB) in DCSCR, which wastes part of the layout area. An area-efficient embedded resistor-triggered silicon-controlled rectifier (ERTSCR) is proposed in this paper. As verified in a 0.3-μm CMOS process, the proposed ERTSCR exhibits lower triggering voltage due to series diode chains and embedded deep n-well resistor in the trigger path. Additionally, the proposed ERTSCR has a failure current of more than 5 A and a corresponding HBM ESD robustness of more than 8 KV. Furthermore, compared with the traditional DCSCR, to sustain the same ESD protection capability, the proposed ERTSCR will consume 10% less silicon area by fully utilizing the lateral dimension in the deep n-well extension region, while the proposed ERTSCR has a larger top metal width.
Highlights
The silicon-controlled rectifier (SCR) has been widely used in electrostatic discharge (ESD)protection for a long time due to its significantly high robustness and area efficiency [1]
Compared with the traditional direct-connected SCR (DCSCR), to sustain the same ESD protection capability, the proposed embedded resistor-triggered silicon-controlled rectifier (ERTSCR) will consume 10% less silicon area by fully utilizing the lateral dimension in the deep n-well extension region, while the proposed ERTSCR has a larger top metal width
The minimum extension (L1) of a deep NWELL (DNW) region beyond a PWELL region is several micrometers according to the layout design rule, which will result in the DCSCR consuming more silicon area compared to the conventional
Summary
The silicon-controlled rectifier (SCR) has been widely used in electrostatic discharge (ESD). The main SCR conduction path of DCSCR (illustrated by a red arrow) is triggered by two direct-connected diodes D1 (P+/NWELL diode) and D2 (PWELL/N+ diode), which are located in the adjacent NWELL and PWELL, respectively (illustrated by a blue arrow named as diode chain path). These two diodes are connected by anode gate (N+ in NWELL) and cathode gate (P+ in PWELL), which are connected together by a metal connection. It can becan observed that equivalent circuit diagram of proposed proposed are shown shown
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