Area-efficient CMOS distributed amplifier using compact CMOS interconnects

Abstract

An area-efficient 20-stage distributed amplifier (DA) implemented in a 0.18 µm CMOS process is presented. To implement the artificial transmission line of the distributed amplifier, closely-placed single-wire CMOS interconnects are employed instead of conventional on-chip spiral inductors. Based on this technique, the area of the CMOS DA is reduced to 0.4 mm2. The proposed DA exhibits a gain of 9 dB and a unity gain bandwidth of 27 GHz. Input and output return losses are less than 12 and 8 dB, respectively.