Abstract
This letter proposes area-efficient peripheral circuit techniques for 3D Solid State Drive (SSD) with NAND flash memories. We reduced charge pump stage using external high voltage of 12V and 5V, and improve target voltage accuracy using a cascode error amplifier of high voltage linear regulator. Also, we proposed fast transient response active mode VDC using NMOS pass element with external high voltage of 5V.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
