Abstract
Area, Delay and Power Analysis of Built in Self Repair Using 2-D Redundancy
Highlights
System-on-Chip being the demand of today‟s world brings hardware and software components together
Built In Self Repair (BISR) uses Memory Built In Self Test (MBIST) to detect and locate faults in the memory
Six different march algorithms namely MATS, MATS+, March X, March Y, March LR, March C- are used in designed BIST
Summary
System-on-Chip being the demand of today‟s world brings hardware and software components together. SOC provides complete solution by incorporating programmable processor, memory, different controllers like audio video and graphics on a single chip. If a single component becomes faulty whole chip needs to be replaced affecting the yield. Memory occupies more than 90% of the total chip area. Such high density memories are susceptible to faults which reduces the yield of SOC. This leads to the need of self-repair. Built In Self Repair (BISR) uses Memory Built In Self Test (MBIST) to detect and locate faults in the memory. Since in CMOS heat dissipation is proportional to switching activity chip can get damaged due to overheating resulting in low yield of SOC. Reduction in power consumption during testing and repairing is an important design challenge
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
