Architecture design of a FPGA-based wavefront processor for correlating a Shack-Hartmann sensor

Abstract

During solar observation, atmosphere turbulence usually blur the solar image coming from solar telescope. In order to improve the quality of solar image, solar Adaptive Optical (AO) system is equipped. In a typical solar AO system, Correlating Shack-Hartmann (SH) wavefront sensor is used to detect the aberration of the blurred image. To detect the aberration as well as possible, frame rate of CCD working after the SH sensor must be fast enough to keep pace with the variation of turbulence. CCD with 1000 Hz frame rate is very common in solar adaptive optical system. What's more, next generation telescope is so large that resolution of CCD becomes higher and higher. So it requires the wavefront processor a huge amount of processing power. As FPGA (Field Programmable Gate Array) technology becomes more powerful, they can provide amazing processing ability by high speed and parallel processing. This paper gives out a design of FPGA-based wavefront processor in solar adaptive optical system. It is characterized by pipeline and parallel architecture. The peak operation speed is over 86G/s and calculation latency is 7.04 us in a system with 16×16 sub-aperture array, which is 16×16 pixel in size each and for which the reference image is 8×8 pixel. Using this processor, frame rate of the CCD can be up to 8800 fps. Built in a single FPGA, it is low-cost, compact and easy to be upgraded.