ARCHITECTURE-BASED SOFTWARE RELIABILITY ANALYSIS INCORPORATING CONCURRENCY

Abstract

With the growing complexity of software applications and increasing reliance on the services provided by these applications, architecture-based reliability analysis has become the focus of several recent research efforts. Most of the prevalent research in this area does not consider simultaneous or concurrent execution of application components. Concurrency, however, may be common in modern software applications. Thus, reliability analysis considering concurrent component execution within the context of the application architecture is necessary for contemporary software applications. This paper presents an architecture-based reliability analysis methodology for concurrent software applications. Central to the methodology is a state space approach, based on discrete time Markov chains (DTMCs), to represent the application architecture taking into consideration simultaneous component execution. A closed form, analytical expression for the expected application reliability based on the average execution times, constant failure rates, and the average number of visits to the components is derived. The average number of visits to application components are obtained from the solution of the DTMC model representing the application architecture. The potential of the methodology to facilitate sensitivity analysis, identification of reliability bottlenecks, and an assessment of the impact of workload and component changes, in addition to providing a reliability estimate, is discussed. To enable the application of the methodology in practice, estimation of model parameters from different software artifacts is described. The methodology is illustrated with a case study. Finally, strategies to alleviate the state space explosion issue for an efficient application of the methodology are proposed.