Architecture and first prototype tests of the clear-PEM electronics systems

Abstract

The Clear-PEM detector system is a compact positron emission mammography scanner with about 12,000 channels aiming at high sensitivity and good spatial resolution. Front-end, trigger and data acquisition electronics are crucial components of this system. Front-end system is implemented as a data-driven synchronous design that identifies and multiplexes the analogue signals (channels) whose associated energy is above a pre-defined threshold. The trigger and data acquisition logic uses digitized front-end data streams and computes the pulses amplitude and timing. Based on this information it generates a coincidence trigger signal that is used to initiate the conditioning and transfer processes of the corresponding data towards the data acquisition computer. To minimize dead-time, data acquisition electronics architecture makes extensive use of pipeline processing structures and de-randomizer memories with multi-event capacity. The system operates at 100 MHz clock frequency and is capable to sustain a data acquisition rate of 1 million events per second with efficiency above 95%, under a total single photon background rate of 10 MHz. The basic component of the front-end system is a low-noise amplifier-multiplexer chip presently under development The off-detector system is designed around a dual-bus crate backplane for fast intercommunication among system modules. The trigger and data acquisition logic is implemented in large FPGAs with 4 million gates. Monte Carlo simulation results of the trigger efficiency, as well as results of hardware simulations are presented, showing the correctness of the design and implementation approach.