Abstract
Interconnection networks ( ins) play an important role in Multiprocessor systems. Arbiters are required to resolve memory access conflicts and path conflicts in the ins. The paper presents implementation of these arbiters considering both equal acceptance and priority to infrequent or i/ o requests. Introduction of self-checking circuits to improve the reliability has also been considered. The ins considered are crossbar, multistage interconnection networks and multiple-bus.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
