Abstract
We present a software environment for the efficient simulation of cellular processor arrays (CPAs). This software (APRON) is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.
Highlights
Parallel processing systems have been the topic of high-performance computing research and design for many years [1,2,3,4], but in recent years single-chip implementations of such systems are becoming a reality
This paper introduced an efficient software package used for the simulation and prototyping of cellular processor arrays
An example application of modelling a hardware Cellular processor arrays (CPAs) was presented, and the benefits that APRON provided to the user experience of working with the CPA were highlighted
Summary
Parallel processing systems have been the topic of high-performance computing research and design for many years [1,2,3,4], but in recent years single-chip implementations of such systems are becoming a reality. The software fulfils two objectives: firstly to provide an extensible, customisable implementation of a general purpose array processing engine, which is a basis for the design and “virtual prototyping” of new CPAs; secondly to provide a high-speed emulation of any CPA-based device, allowing the user to design pixel-parallel image processing algorithms and explore multilayer neural networks, cellular automata, and other phenomena related to CPAs, with a variety of tools for data analysis, performance evaluation, and algorithm development. APRON software is written to take advantage of the high-speeds of modern desktop computer systems to provide optimised array processing performance To this end it is not intended to replace low-power embedded devices but serves as a fast, accurate substitute in environments where custom hardware is not available. Throughout the paper, performance figures are presented, which are summarised in the conclusion
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