Abstract
Digital circuits can be approximated in which the exact functionality can be relaxed. Approximate circuits are constructed such that the logic given by the user is not implemented completely and hence their functionality can be traded for area, delay and power consumption. An evolutionary approach like Cartesian Genetic programming (CGP) is used in this paper to make automatic design process of digital circuits. The quality of approximate circuits can be improved along with the reduction of evolution time by using a heuristic population seeding method which is embedded into CGP. In particular, digital circuits like full adder, 2 bit multiplier and 2 bit adder are addressed in this paper. Experimental results are given where random seeding mechanism is compared with heuristic seeding methods.
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