Approximate Restoring Dividers Using Inexact Cells and Estimation From Partial Remainders

Abstract

Approximate computing can be used in error-resilient applications to reduce power consumption and increase overall circuit performance. This article introduces two approximate dividers with restoring array-based architecture that achieve substantial hardware savings while maintaining high accuracy when compared to existing approximate designs. The first design replaces exact restoring divider cells with a proposed approximate cell in a column-wise fashion. The second design uses several rows of exact architecture to compute a partial remainder and then rounds and encodes the divisor and this partial remainder so that they may be used to express approximate outputs. A comprehensive accuracy and performance evaluation are performed for the proposed dividers as well as other state-of-the-art designs. When compared to an exact design, the proposed dividers have a reduced area and power consumption of 46 and 57 percent respectively while introducing minimal error. Furthermore, the trade-off between accuracy and improved performance is explored for various approximate dividers in order to determine which designs achieve the best compromise. The accuracy of the proposed dividers is then demonstrated using two image processing applications.