Approximate Logic Synthesis and its Application in Image Signal Processor

Abstract

As power consumption in digital systems grows rapidly, energy efficiency has become a crucial concern. To address this, approximate computing was proposed as an innovative paradigm. In this work, we realize an approximate logic synthesis (ALS) toolchain utilizing Boolean matrix factorization algorithm based on error sharping technique (ESBMF) and open-source tools, its basic operation is to generate the corresponding approximation circuit by different input error thresholds. Moreover, we also present an approximate image signal processor (APPROX-ISP). Compared to the original counterpart, APPROX-ISP achieves area benefits of 44.2%, 36.7%, 34.1%, 34.5%, power consumption benefits of 49.9%, 38.6%, 37.1%, 52.2%, and delay benefits of 57.6%, 34.9%, 51.0%, 19.5% using 12-bit Adder, 14-bit Adder, 15-bit Adder and 8-bit Multiplier, respectively. Our experiment demonstrates that there is almost no accuracy degradation in machine learning tasks while using APPROX-ISP.