Approximate Adiabatic Logic for Low-Power and Secure Edge Computing

Abstract

Approximate computing is a promising approach for error-tolerant applications running on the Internet-of-Things edge devices to reduce power consumption. However, approximate computation is susceptible to side-channel attacks, such as attacks based on differential power analysis (DPA). Energy efficiency could be further enhanced by applying adiabatic logic in approximate edge computing while increasing its protection against the side-channel attacks. As a case study, we are presenting two approximate adders based on adiabatic logic to illustrate the benefits of approximate computation combined with adiabatic logic. The proposed approximate adders leverage the dual-rail property of adiabatic logic to minimize the overall size and further decrease energy consumption. In this article, the first design is true sum approximate adder (TSAA), whereas the second design is True Carry-out Approximate Adder (TCAA). There are fewer transistors in adiabatic logic-based TSAA and TCAA compared to CMOS-based accurate mirror adder (AMA). At 12.5-MHz operating frequency and 45-nm technology node, the adiabatic TSAA and TCAA achieved power savings of 95.4% and 95.48% and energy savings of 90.80% and 90.96% in comparison with the standard CMOS AMA. We also show that both designs proposed are more secure against DPA attacks.