Approximate 5-2 Compressor Cell Using Spin-Based Majority Gates

Abstract

One of the most interesting solutions for decreasing the static power of computational circuits is to use approximate computing. Approximate computing has been extensively considered to trade-off limited accuracy for improvements in other circuit metrics such as area, power and performance. On the other hand, the increasing leakage power and limited scalability have become serious obstacles that prevent the continuous miniaturization of conventional CMOS-based logic circuits. Spintronic devices are being considered as a promising alternative technology for silicon-based FET to implement digital circuits. In this paper, an approximate 5-2 compressor cell is presented using spin-based devices. The proposed circuit is designed by majority gates which can be implemented very easily and efficiently by spintronic threshold device (STD). The proposed design has been simulated comprehensively for both quantitative and qualitative metrics. The results show that the spin-based compressor decreases the power consumption about 7X compared to the best state-of-the-art design. Also, the application simulations using the multiplier implemented by the proposed compressor indicate the acceptable results.