Approach to synthesis of fault tolerant reduced device count multilevel inverters (FT RDC MLIs)

Abstract

Multilevel inverters (MLIs) are rapidly acquiring techno-economic feasibility for both high-power and medium-power applications. Increased number of power switches has been cited as one of the most important limitations of MLIs; and to overcome it, a whole new class of MLI topologies has come up. These topologies are commonly called `reduced device count' MLIs (RDC-MLIs). As the number of controlled switches is significantly reduced in RDC-MLIs, the redundant states are also reduced. Hence, the possibility of fault tolerant operation is severely affected. This study looks at the possibility of imparting fault-tolerant characteristics to RDC-MLIs. In this study, some of the recently proposed RDC-MLI topologies are first analysed for the possibility of fault tolerant operation in the case of `any single switch open-circuit fault (ASSOF)'. Thereafter, an optimal addition of power switch is proposed which enables fault tolerant operation in the event of ASSOF. Furthermore, these modified RDC-MLIs are verified under normal and faulty conditions using software simulations and experimental set-ups and these results are presented.