Applying Vector Processing to Active Sonars for Increased Accuracy and an Expanded Operating Envelope

Abstract

ABSTRACTAdvanced computing technology development now allows considerable computational power to be packaged in small, modular components for low costs. In particular, vector and array processor add‐on boards offer a way to incorporate modern parallel capabilities into existing hardware systems. In addition to cost efficiency, the fact that these boards may be able to plug‐in to existing computer systems provides both design flexibility and a more rapid way of upgrading deployed computer hardware. To take advantage of such processing capabilities, however, algorithm analysis must be performed to determine what functions can be efficiently off‐loaded to the vector processing board, and to decide what parts of the original serial algorithm should be redesigned to take advantage of the new hardware architecture.This paper presents a case study of how these issues are being addressed in a real‐time active sonar data processing system. Vector processing technologies are being analyzed for application to correlation sonar systems used for estimating ship velocity on submarines, surface ships, and autonomous underwater vehicles. Such a system is deployed on Trident II SSBNs and is meeting its current design objectives. However, real‐time operation of the correlation sonar is computationally intensive and fully utilizes the processing power of the fielded computing hardware. Expansions in the accuracy and operating envelope of the system are desirable and are not limited by the physics or practical operation of the sonar system, but rather by the speed at which processing of hydrophone returns can be performed. This analytic feasibility study investigates the possibility of expanding the operating envelope through the use of vector processing technology, within the constraint that any hardware or software changes would have minimal impact on the deployed system. It is predicted that significant speedups and operating envelope expansions can be achieved by introducing vectorized hardware and algorithms into the existing scalar system.