Apply Yolov4-Tiny on an FPGA-Based Accelerator of Convolutional Neural Network for Object Detection

Abstract

With the continuous expansion of Neural Network technology in the artificial intelligence field, for example, image recognition and retrieval, object detection, pixel processing, automatic speech generation, etc., Convolutional Neural Networks (CNN) and Deep Learning of Neural Networks (DNN) have made apparent breakthroughs. To improve the inference speed of images, the combination of FPGA-based acceleration and multiple model quantization methods has become one of the most contemporary alternative methods. This paper designed an FPGA-Based acceleration scheme combining software and hardware and effectively applied it to the Yolov4-Tiny object detection model, realizing the accelerated detection inference process from the original 6-7mins to 383ms. First, it chose the static quantization method of fixed-point numbers, fixed the position of the decimal point, and then added Batch Norm between the convolutional layer and the activation function to form a connection structure. Second, it further improved inference speed on an FPGA with a version of ZYNQ-7020 by increasing the bandwidth cap and reducing bandwidth requirements, employing a massive pipeline design. Finally, in the test of the Coco dataset, the plan has completed a substantial acceleration of the average inference speed of the Yolov4-Tiny object detection model from 7.13mins/Picture to 498.89ms/Picture, which has a high application value in the field of object detection. It dramatically improves the inference speed as well as keeps the average accuracy above 0.95.