Abstract

This manuscript will provide a step by step method on how a graph theory and topology can be utilized to construct a Z-loop matrix for the study of faulted 3 phase power systems. The growing demand for reliable electrical power supply has forced the pace developments in electrical power system analysis using computer. In this, power system analysis plays a significant role for the analysis of faulted power system, eventually for power system protection and control. By applying theoretical rules in graph theory, an algorithm to construct Z-loop without generating loop incidence matrix for network analysis/circuit analysis was studied. It has more than just minor special cases with those used in network analysis and circuit computer design. This paper describes a new algorithm to construct a loop impedance matrix without generating loop incidence matrix by means of a certain topological relationship, linear graph, or simply graph theory. A linear graph is a graph in which edges/branches are connected only at the points, which are identified as nodes of the graph. Finally numerical sample project was presented by the use of the loop impedance matrix to solve network analysis studies.

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