Abstract
Application-specific instruction set extensions on reconfigurable hardware open up new opportunities for the embedded system designer. Although the flexibility offered by unrestricted instruction set extensions seems strongly attractive in first place, insufficient retargetable compiler support may hamper the benefits. It is therefore useful to reduce the design space of these instruction extensions to widely accepted tools supported instruction formats in order to capitalize on the existing resources. SIMD extensions have been proposed and implemented in the general-purpose processor domain but never brought to the embedded world due to the complexity, area, and energy consumption of SIMD model of computation. In this paper, we propose an application-specific AltiVec compatible customized SIMD synthesis flow well adapted to FPGA platforms which solve both compatibility and customization issues.
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
