Abstract

The development of models to simulate circuits containing new devices is an important task to allow for the introduction of these devices in practical applications. In this paper we show the advantages of using the Symmetric Doped Double-Gate Model recently developed and are already introduced in SmartSpice simulator, for modeling circuits containing Double-Gate Graded-Channel (GC) transistors. In this case there is no need to use two different models to represent the graded-channel device, as has been done up to now. A current-mirror circuit using GC devices has been simulated and the results were validated comparing them with those obtained in MIXED-MODE and two-dimensional ATLAS simulation of the GC devices.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.