Abstract

Use of HVDC circuit breaker in HVDC system shown successful results. But imposing DC fault current during DC fault have not achieved yet. To overcome this problem, there is one alternative solution to use of superconducting fault current limiter (SFCL). This paper deals with application of resistive SFCL (R SFCL ) for high voltage direct current (HVDC) system with direct current circuit breaker (DCCB) by using current breaking topology to estimate the effects of fault current limiter. Point to point HVDC system test bed model designed with SFCL and DC breaker. It is implemented in MATLAB/SIMULINK software. The Direct current (DC) fault current interruption characteristic of Mechanical CB is verified when SFCL was applied. Transient fault simulation is performed by using pole to pole fault created on receiving end.

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