Application of JVD nitride gate dielectric to a 0.35 micron CMOS process for reduction of gate leakage current and boron penetration

Hsing‐Huang Tseng ,P.G.Y Tsui,M Khare,V Wang,T Tamagawa,T.P Ma,P.J Tobin,R Blumenthal,G.J Cui,R Cotton,G Kenig,C Hobbs,J Mogab,M Hartig,V Kaushik,X.W Wang,J.J Schmitt,J Vétéran ,B L Halpern ,Rama I Hegde

doi:10.1109/iedm.1997.650467

Application of JVD nitride gate dielectric to a 0.35 micron CMOS process for reduction of gate leakage current and boron penetration

Hsing‐Huang Tseng , P.G.Y Tsui + Show 18 more

https://doi.org/10.1109/iedm.1997.650467

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Publication Date: Dec 7, 1997

Citations: 17

Affiliation: Motorola (United States), Yale University, Jet Process Corporation (United States)

#Jet Vapor Deposition #Boron Penetration + Show 8 more

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Abstract

The increase in gate leakage current and boron penetration are major problems for scaled gate dielectrics in advanced device technology. We have demonstrated, for the first time, reduction in gate leakage current and strong resistance to boron penetration when Jet Vapor Deposition (JVD) nitride is used as a gate dielectric in an advanced CMOS process. JVD nitride provides a robust interface and well behaved bulk properties, MOSFET characteristics, and ring oscillator performance. Process optimization and manufacturing issues remain to be addressed.

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