Abstract
The key technology in multi-band orthogonal frequency division multiplexing ultra wide band (MB-OFDM-UWB) system is inverse fast Fourier transforms (IFFT) which is used to implement OFDM modulation. However, the realization of multiplier with field programmable gate array (FPGA) in IFFT needs a large number of resources. This paper describes the implementations of IFFT based on coordinate rotation digital computer (CORDIC) algorithm. The whole structure of IFFT using CORDIC algorithm is shown in the form of double-rams architecture which is implemented based on FPGA with the software tools of ISE foundation and modelsim. The simulation results show that it's convenient to realize IFFT with a high speed of more than 270 MHz with fewer resources than by using multipliers of FPGA chip directly and that the implementated IFFT module can produce an output of right data within an acceptable error range.
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