Abstract
Application of high current arsenic ion implantation technology to the fabrication of MOS LSI's is investigated. Substrate temperature rise during ion implantation, carrier profile and residual defect profile after high temperature annealing are measured to solve the fundamental problems involved in high current ion implantation. MOS FET's, junction diodes and 4 K-bit dynamic MOS memory LSI's are fabricated using high current arsenic ion implantation technology. MOS FET characteristics are improved by this implantation technology, when compared with the characteristics of devices fabricated by conventional ampule diffusion technology. The generation-recombination center concentrations derived from junction leakage current measurements are below 1011 cm-3, and are in good agreement with the results for dynamic MOS memory refreshtime.
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