Ant Colony Optimization and its Application to Boolean Satisfiability for Digital VLSI Circuits

Abstract

Ant colony optimization (ACO) [8] is a non-deterministic algorithm framework that mimics the foraging behavior of ants to solve difficult optimization problems. Several researchers have successfully applied ACO framework in different fields of engineering, but never in VLSI testing. In this paper, we first describe the basics of the ACO framework and ways to formulate different optimization problems within an ACO framework. We then present our own ACO algorithm to simultaneously solve multiple boolean SAT instances for digital VLSI circuits. Experiments conducted on scanned versions of ISCAS'89 benchmark circuits produced astonishing results. ACO framework for boolean satisifiability was found 200 times faster than spectral meta-heuristics [36] run in combinational mode. ACO framework has proven to be a promising optimization technique in large number of other fields. Since ACO can be used to solve different types of optimization and search problems, we believe that the concepts presented in this paper can open the gates for researchers solving different optimization problems that exist in VLSI testing more efficiently.