Annealing effects of NTD silicon for semiconductor power devices

Abstract

The use of neutron transmutation doped (NTD) Si has become very important for processing high-voltage power devices. A simple annealing process is usually required to anneal the lattice defects caused by neutron irradiation. This is usually performed by the silicon supplier by annealing the silicon crystal at a low temperature (approximately 700°C). High-voltage power devices, however, require much higher processing diffusion temperature. In situ annealing of silicon, therefore, can occur during device processing. Furthermore, we demonstrate here that higher yield can be obtained using the in situ annealing. This improvement is due to the effectiveness and uniformity of annealing of thin wafers. The uniformity and blocking voltage distribution of high-voltage rectifiers and thyristors using crystal annealed and in situ wafer annealed NTD silicon are presented.