Analytical Surface Potential and Drain Current Models of Dual-Metal-Gate Double-Gate Tunnel-FETs

Abstract

In this paper, a new 2-D analytical model for the surface potential of a dual-metal-gate double-gate tunnel field-effect transistor is presented. It takes into account the effects of the drain and gate voltages, gate metal work function, insulator thickness, silicon film thickness, and source and drain depletions. The surface potential thus obtained is used to calculate the tunneling widths at both the source and drain junctions, which are subsequently used as the limits for the integration of the band-to-band generation rate in order to arrive at the tunneling current. In this paper, the band-to-band tunneling is considered to take place through both the source as well as the drain depletion regions. Our model accounts for the variable drain doping through a fitting function, which is postulated based on the theory of generation current, and the results have been found to predict the correct ambipolar behavior of the tunneling field-effect transistors. The results of our model, both for the surface potential and the tunneling current, match very well with those obtained through the TCAD simulations.