Analytical Parasitic Resistance and Capacitance Models for Nanosheet Field-Effect Transistors

Abstract

We developed analytical compact models of parasitic resistance and capacitance ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RC</i> ) for nanosheet field-effect transistors (NSFETs) with metal contact structures. The proposed model accurately captures the number of sheets, sheet geometry, gate, source, drain, and contact sizes. The parasitic resistance model generated in each region was modeled using the transmission line method (TLM) and the spread resistance model. The parasitic capacitance model was modeled using the conformal mapping method based on the distribution of the electric field. The developed models were validated by changing the structural parameters. The proposed models were implemented in Berkeley short-channel IGFET model (BSIM)-common multi-gate (CMG) to enable circuit performance prediction. With our proposed model, we can accurately predict the circuit performance of NSFETs, capturing the recent scaling trends and process variations in the proposed NSFET.