Abstract
We discuss the thermal effects on scaling, retention, and error rate in filamentary resistive memories from a theoretical perspective using an analytical approach. Starting from the heat equation, we derive the temperature profile surrounding a resistive memory device and calculate its effect on neighboring devices. We outline the engineering tradeoffs that are expected with continued scaling, such as retention and power use per device. Based on our calculations, we expect scaling to continue well below 10 nm, but that the effect of heating from neighboring devices needs to be considered for some applications even at current manufacturing capabilities. We discuss possible designs to alleviate some of these effects while further increasing device density.
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