Analytical Equivalent Circuit Extraction Procedure for Broadband Scalable Modeling of Three-Port Center-Tapped Symmetric On-Chip Inductors

Abstract

This paper presents a new, almost fully analytical methodology for component value extraction of a double- ${\pi }$ equivalent circuit model for three-port on-chip inductors from a given S-parameter dataset. The compact model provides an accurate fit over a wide frequency range from dc to beyond the self-resonance frequency (SRF) to a tabular input ${S}$ -parameter model describing a symmetric center-tapped on-chip inductor. The input dataset may be obtained from a measurement or from an electromagnetic field solver simulation. Using a passive broadband equivalent circuit instead of the original ${S}$ -parameters’ description is advantageous for circuit design, as it facilitates the convergence of transient simulations. The proposed approach carefully considers center-tap parasitics. Hence, the obtained equivalent circuit model fits the input inductor characteristics accurately not only for differential excitation but also in the common-mode and single-ended operation. Due to the fact that the proposed extraction approach is based on physical assumptions and analytical circuit decomposition, the obtained component values are physically meaningful and relate to geometry. Thus, this approach is suitable for the generation of scalable compact models, which can be used to speed-up inductor optimization during the RF circuit design. The proposed methodology has been verified on a three-port inductor realized in a 28-nm CMOS technology and measured up to 60 GHz. The extracted equivalent circuit model exhibits an accurate fit to the measured data over the entire frequency range in all operation modes. Finally, field-solver models are used to verify the scalability.