Analytical Design Space Exploration Based on Statistically Refined Runtime and Logic Estimation for Software Defined Radios

Abstract

The exploration of the design space for complex hardware-software systems requires accurate models for the system components, which are often not available in early design phases, resulting in error-prone resource estimations. For a HWSW system with a finite set of design points, we present an analytical approach to evaluate the quality of a distinctive design point choice. Our approach enables the designer to gain a measure for statistical confidence whether an application with realtime requirements can be successfully implemented on a chosen set of processors and reconfigurable logic. By a statistical evaluation of runtime, latency, logic resources and memory requirements, a probability metric for each realization alternative in the system is derived, that gives a realization probability for different mappings and different combinations of chips. We apply our principles to an FPGA/DSP digital radio receiver system and evaluate the realization probabilities for a different combination of chip sizes and mappings. Finally, we compare our approach against conventional estimation techniques, such as worst-case evaluation.