Analytical Delay Modeling for a Sub-Threshold Cell Circuit with the Inverse Gaussian Distribution Function

Abstract

Considering that power consumption (PC) is an extremely important indicator in digital circuit design, lower PC has always been our pursuit. PC and power supply voltage are positively correlated, and in this case, we must reduce the operating voltage of the circuit. However, as the voltage continues to decrease, various secondary effects and process variations become increasingly influential, making the delay distribution and its statistical characteristics more difficult to predict. In this paper, an inverse Gaussian distribution is used to model the propagation delay. Taking into account the local process variation, the multi-input delay analytical expression is derived according to the sub-threshold current formula to accurately predict the distribution and statistical characteristics of the delay, and the delay is obtained by calculation instead of Monte Carlo simulation, which greatly reduces the simulation time. The accuracy of the delay expression and delay distribution have been tested under 22 nm FDSOI technology and good results were obtained with operating voltages from 0.20 V to 0.30 V, in which the mean error of the delay is approx. 1.5%, the variance error is approx. 4.3%, and the error of the cumulative distribution function is approx. 2%.