Abstract

The quality of a via hole on a multilayer stack of Low Temperature Co-fired Ceramic (LTCC) tape is of utmost importance to its functionality. This paper investigates a substitute for the commonly used circular shape hole to a more complex one and its implications when different parameters such as sheet thickness, punch speed, travel distance and tool clearance are changed. Fabrication of the punch tools and the punching process is carried out at the same machine, ensuring alignment. Two types of non-circular shape are chosen to carry out the experiment. Pre-sintered complex shape hole measurements show that while punch conditions such as speed and tool gap have little effect on the size, sheet thickness and travel depth play a vital role in the overall dimension. Albeit having only a slight effect on the size, those parameters are significant in other aspects of hole quality. Post-sintering investigation is also observed and discussed.<

Highlights

  • Once being seen as a promising breakthrough in electronics decades ago, multilayer Low Temperature Co-Fired Ceramics (LTCC) technology went through a downfall after the passing of the millennia due to the process complexity and limited production usage

  • This paper investigates a substitute for the commonly used circular shape hole to a more complex one and its implications when different parameters such as sheet thickness, punch speed, travel distance and tool clearance are changed

  • Measurement is taken on the centre distance of two circles and in this case shows an adequate precision for the test

Read more

Summary

Introduction

Once being seen as a promising breakthrough in electronics decades ago, multilayer Low Temperature Co-Fired Ceramics (LTCC) technology went through a downfall after the passing of the millennia due to the process complexity and limited production usage. The upcoming era of industry 4.0 is giving a strong push towards a more specified and customized application based electronics. Co-fired ceramics still holds a promising future in electronics. The technology is used in electronic packaging for its high resistance to environmental stress [2]

Methods
Results
Conclusion
Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call